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Instruction simd
(Page:2)
DIVSS (Divide scalar single-precision floating-point)
LDMXCSR (Load Streaming SIMD Extension Control and Status Register)
MAXPS (Maximum packed single-precision floating-point)
MAXSS (Maximum scalar single-precision floating-point)
MINPS (Minimum packed single-precision floating-point)
MINSS (Minimum scalar single-precision floating-point)
MOVAPS (Move aligned packed single-precision floating-point)
MOVHPS (Move aligned high packed single-precision floating-point)
MOVLPS (Move aligned low packed single-precision floating-point)
MOVMSKPS (Move mask packed single-precision floating-point)
MOVNTPS (Non-temporal store of packed single-precision floating-point)
MOVNTQ (Non-temporal store of packed integer in a MMX technology register)
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Instruction simd - DIVSS (Divide scalar single-precision floating-point)

instruction divides the least significant pair of packed single-precision floating-point operands; the upper three fields are passed through from the source operand.
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